Publications

Papers

A Game-Based Framework to Compare Program Classifiers and Evaders, Proceedings of the 21st ACM/IEEE International Symposium on Code Generation and Optimization.

PDF ACM

Aceleradores com CGRAs para Redes Reguladoras de Genes, Anais do XXIII Simpósio em Sistemas Computacionais de Alto Desempenho.

PDF

Impacto de Ofuscadores e Otimizadores de Código na Acurácia de Classificadores de Programas, Proceedings of the XXVI Brazilian Symposium on Programming Languages.

PDF SBC OpenLib ACM

Algoritmos de Posicionamento e Roteamento baseados em Travessia de Grafo para Arquiteturas Reconfiguráveis de Grão Grosso (CGRA), Anais do XXXV Concurso de Teses e Dissertações.

PDF SBC OpenLib

Fast flow cloud: A stream dataflow framework for cloud FPGA accelerator overlays at runtime, Concurrency and Computation: Practice and Experience (CCPE).

Wiley Online Library

A Polynomial Time Exact Solution to the Bit-Aware Register Binding Problem, Compiler Construction (CC).

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Heterogeneous reconfigurable architectures for machine learning dataflows, Concurrency and Computation: Practice and Experience (CCPE).

Wiley Online Library

TRAVERSAL: A Fast and Adaptive Graph-based Placement and Routing for CGRAs, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

IEEE Xplore

Mind the Gap: Bridging Verilog and Computer Architecture, 2020 IEEE International Symposium on Circuits and Systems (ISCAS).

IEEE Xplore

A Design Exploration of Scalable Mesh-based Fully Pipelined Accelerators, 2020 The International Conference on Field-Programmable Technology (FPT).

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Design Exploration of Machine Learning Data-Flows onto Heterogeneous Reconfigurable Hardware, XXI Symposium on High Performance Computing Systems (WSCAD).

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HPCGRA-An Orthogonal Designed CGRA Generator for High Performance Spatial Accelerators, XXI Symposium on High Performance Computing Systems (WSCAD).

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Plain: Ferramenta para Desenvolvimento de Aceleradores para Overlays em FPGA na Nuvem em Tempo de Execução, XXI Symposium on High Performance Computing Systems (WSCAD).

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Simulação de Redes Reguladoras de Genes com Lógica Booleana e Limiar em Plataformas Alto Desempenho, XX Symposium on High Performance Computing Systems (WSCAD).

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READY: A fine-grained multithreading overlay framework for modern CPU-FPGA dataflow applications, ACM Transactions on Embedded Computing Systems (TECS).

ACM

Minimum Switching Networks, VIII Brazilian Symposium on Computing Systems Engineering (SBESC).

IEEE Xplore

A gpu/fpga-based k-means clustering using a parameterized code generator, Symposium on High Performance Computing Systems (WSCAD).

IEEE Xplore

Exemplos e aplicações utilizando a ferramenta ADD, Symposium on High Performance Computing Systems (WSCAD).

ResearchGate

Perspectivas para o uso do Node-Red no Ensino de IoT, International Journal of Computer Architecture Education.